1. Field of the Invention
The present invention relates to a sample hold circuit formed in a semiconductor integrated circuit in a semiconductor device and a semiconductor device having the same.
2. Related Background Art
A conventional sample hold circuit is designed to hold an input level at every sample timing and used to measure the instantaneous value of a signal which changes with time. For example, this circuit is used on the input stage of an A/D converter to temporarily hold an analog value. That is, the circuit is used on the input stage of the A/D converter when the level of the analog value is to be converted into a digital value.
This sample hold circuit includes a high-speed non-feedback type circuit (poor precision) like the one shown in FIG. 1, a low-speed, high-precision feedback type circuit like the one shown in FIG. 2, an integrating type circuit like the one shown in FIG. 3, which has performance intermediate between the above circuits, and the like.
As shown in FIG. 1, the non-feedback type is the most basic sample hold circuit scheme, and constituted by an input buffer circuit 11, a switch circuit 12, a hold capacitor C.sub.H, and a high-input-impedance output buffer 13. An analog signal is input to an input terminal 10. The switch circuit 12 is turned on/off in accordance with a sampling timing. The output voltage of the input buffer circuit 11 which is set when the switch circuit 12 is on in the sample mode is charged into the hold capacitor C.sub.H in an acquisition time. When the switch circuit 12 is turned off, the hold mode is set, and a voltage corresponding to the charged voltage is output from the output buffer 13. For example, this output voltage is converted into a digital value before the arrival of a timing signal next to the sampling timing. Alternatively, the output voltage is shaped into a staircase waveform to be sampled.
In this case, as the switch circuit 12, a switch circuit 19 using a diode bridge 18 like the one shown in FIG. 4 is generally used. Referring to FIG. 4, constant current sources I4 and I5 are repeatedly turned on/off under the control of a switch control signal 17, and an analog signal output from the input terminal 10 when the diodes of the diode bridge 18 are turned on is charged into a hold capacitor C.sub.H. When the diodes of the diode bridge 18 are not turned on, the charged voltage of the hold capacitor C.sub.H is held. The switch circuit 19 has a high speed because the switching speed of the diode bridge 18 as a switching element is high as compared with other elements such as a binary transistor, an FET, and a MOSFET. This is because, the diode bridge 18 has a small capacitance component.
As shown in FIG. 5, the output buffer 13 is generally constituted by FET source followers M5 and M6 and emitter followers Q12 and Q13. Referring to FIG. 5, a hold capacitor C.sub.H for holding an analog value on the previous stage is connected to an input terminal 20, and the charged voltage of the hold capacitor C.sub.H is applied to the gates of the MOS transistors M5 and M6. The source outputs of the MOS transistors M5 and M6 of an EFT source follower circuit arrangement are respectively connected to constant current sources I6 and I7 and are input to the bases of the transistors Q12 and Q13 of a push-pull emitter follower arrangement to be output to an output terminal 14 through the emitters of the transistors Q12 and Q13. In this case, since a voltage is input to the voltage-dependent MOSFET, a high-speed operation is performed. With the output arrangement using the emitter followers Q12 and Q13, high-speed output response can be realized in accordance with the input voltage.
The arrangement of the non-feedback type shown in FIG. 1, however, provides no compensation for variations in power supply voltage, changes in temperature, and the like, and hence a high precision is difficult to attain. To satisfy both the demands for higher speed and precision, a high-speed operational amplifier with an FET input is used as an output buffer 21, and a switch circuit 19 is bootstrapped from the output of the amplifier to increase the precision. More specifically, the output of the output buffer 21 is fed back to the switch circuit 19. When the output increases, the levels of current sources I4 and I5 are decreased to decrease the charged voltage of a capacitor C.sub.H, thereby increasing the ON resistance of a switch diode 18. In this manner, a negative feedback operation from the output buffer 21 is performed to obtain an accurate charged voltage.
With such a circuit arrangement, however, the current consumption may increase because of increases in circuit size and the levels of the constant current sources I4 and I5.
According to the feedback type shown in FIG. 2, since a voltage is not fed back to the switch circuit but is fed back to the overall circuit up to the input terminal of the input buffer 15 including the switch unit 12, a high precision can be basically obtained, but a delay is caused by a feedback operation. That is, a high-speed circuit is difficult to realize. Although a circuit of this type is often used as a standard monolithic sample hold circuit arrangement for audio signal processing, this circuit is not suited for a video signal processing circuit arrangement and the like requiring high-speed processing.
According to the integrating type in FIG. 3, which exhibits performance intermediate between the above two types, a hold capacitor C.sub.H is connected between the inverting input terminal and output terminal of an operational amplifier 16, and a switch 12 is arranged between an input resistor R.sub.IN and a feedback resistor R.sub.F. Since the switch unit is in the negative feedback system, a high precision can be obtained. It is, however, difficult to realize high-speed signal processing because a band is limited by the time constants of the input resistor R.sub.IN and the hold capacitor C.sub.H.
With the above circuit arrangements, it is difficult to satisfy both the demands for higher speed and precision. To satisfy the demands, for example, the circuit size and the current consumption must be increased.